By way of background of the art, there is Japanese Patent Application No. 2000-285911 (Patent Literature 1). This publication describes a “configuration that includes: an FPGA; a non-volatile memory for storing the logic circuit configuration of the FPGA, as well as error status information on the details of an error that occurs within the device or in the interface with the outside; a CONFIG control unit for reading a program to configure the logic of the FPGA from the non-volatile memory; an error information access control unit for writing the error status information into the non-volatile memory; and a selection circuit for selecting the address and control signals for the non-volatile memory”.